Open FFBoard
Open source force feedback firmware
tusb_mcu.h
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1/*
2 * The MIT License (MIT)
3 *
4 * Copyright (c) 2021, Ha Thach (tinyusb.org)
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 *
24 * This file is part of the TinyUSB stack.
25 */
26
27#ifndef TUSB_MCU_H_
28#define TUSB_MCU_H_
29
30//--------------------------------------------------------------------+
31// Port/Platform Specific
32// TUP stand for TinyUSB Port/Platform (can be renamed)
33//--------------------------------------------------------------------+
34
35//------------- Unaligned Memory Access -------------//
36
37#ifdef __ARM_ARCH
38 // ARM Architecture set __ARM_FEATURE_UNALIGNED to 1 for mcu supports unaligned access
39 #if defined(__ARM_FEATURE_UNALIGNED) && __ARM_FEATURE_UNALIGNED == 1
40 #define TUP_ARCH_STRICT_ALIGN 0
41 #else
42 #define TUP_ARCH_STRICT_ALIGN 1
43 #endif
44#else
45 // TODO default to strict align for others
46 // Should investigate other architecture such as risv, xtensa, mips for optimal setting
47 #define TUP_ARCH_STRICT_ALIGN 1
48#endif
49
50/* USB Controller Attributes for Device, Host or MCU (both)
51 * - ENDPOINT_MAX: max (logical) number of endpoint
52 * - ENDPOINT_EXCLUSIVE_NUMBER: endpoint number with different direction IN and OUT aren't allowed,
53 * e.g EP1 OUT & EP1 IN cannot exist together
54 * - RHPORT_HIGHSPEED: support highspeed with on-chip PHY
55 */
56
57//--------------------------------------------------------------------+
58// NXP
59//--------------------------------------------------------------------+
60#if TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX)
61 #define TUP_USBIP_IP3511
62 #define TUP_DCD_ENDPOINT_MAX 5
63
64#elif TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX)
65 #define TUP_DCD_ENDPOINT_MAX 16
66 #define TUP_USBIP_OHCI
67 #define TUP_OHCI_RHPORTS 2
68
69#elif TU_CHECK_MCU(OPT_MCU_LPC51UXX)
70 #define TUP_USBIP_IP3511
71 #define TUP_DCD_ENDPOINT_MAX 5
72
73#elif TU_CHECK_MCU(OPT_MCU_LPC54)
74 // TODO USB0 has 5, USB1 has 6
75 #define TUP_USBIP_IP3511
76 #define TUP_DCD_ENDPOINT_MAX 6
77
78#elif TU_CHECK_MCU(OPT_MCU_LPC55)
79 // TODO USB0 has 5, USB1 has 6
80 #define TUP_USBIP_IP3511
81 #define TUP_DCD_ENDPOINT_MAX 6
82
83#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
84 // USB0 has 6 with HS PHY, USB1 has 4 only FS
85 #define TUP_USBIP_CHIPIDEA_HS
86 #define TUP_USBIP_EHCI
87
88 #define TUP_DCD_ENDPOINT_MAX 6
89 #define TUP_RHPORT_HIGHSPEED 1
90
91#elif TU_CHECK_MCU(OPT_MCU_MCXN9)
92 // USB0 is chipidea FS
93 #define TUP_USBIP_CHIPIDEA_FS
94 #define TUP_USBIP_CHIPIDEA_FS_MCX
95
96 // USB1 is chipidea HS
97 #define TUP_USBIP_CHIPIDEA_HS
98 #define TUP_USBIP_EHCI
99
100 #define TUP_DCD_ENDPOINT_MAX 8
101 #define TUP_RHPORT_HIGHSPEED 1
102
103#elif TU_CHECK_MCU(OPT_MCU_MCXA15)
104 // USB0 is chipidea FS
105 #define TUP_USBIP_CHIPIDEA_FS
106 #define TUP_USBIP_CHIPIDEA_FS_MCX
107
108 #define TUP_DCD_ENDPOINT_MAX 16
109
110#elif TU_CHECK_MCU(OPT_MCU_MIMXRT1XXX)
111 #define TUP_USBIP_CHIPIDEA_HS
112 #define TUP_USBIP_EHCI
113
114 #define TUP_DCD_ENDPOINT_MAX 8
115 #define TUP_RHPORT_HIGHSPEED 1
116
117#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32L, OPT_MCU_KINETIS_K)
118 #define TUP_USBIP_CHIPIDEA_FS
119 #define TUP_USBIP_CHIPIDEA_FS_KINETIS
120 #define TUP_DCD_ENDPOINT_MAX 16
121
122#elif TU_CHECK_MCU(OPT_MCU_MM32F327X)
123 #define TUP_DCD_ENDPOINT_MAX 16
124
125//--------------------------------------------------------------------+
126// Nordic
127//--------------------------------------------------------------------+
128#elif TU_CHECK_MCU(OPT_MCU_NRF5X)
129 // 8 CBI + 1 ISO
130 #define TUP_DCD_ENDPOINT_MAX 9
131
132//--------------------------------------------------------------------+
133// Microchip
134//--------------------------------------------------------------------+
135#elif TU_CHECK_MCU(OPT_MCU_SAMD21, OPT_MCU_SAMD51, OPT_MCU_SAME5X) || \
136 TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAML21, OPT_MCU_SAML22)
137 #define TUP_DCD_ENDPOINT_MAX 8
138
139#elif TU_CHECK_MCU(OPT_MCU_SAMG)
140 #define TUP_DCD_ENDPOINT_MAX 6
141 #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
142
143#elif TU_CHECK_MCU(OPT_MCU_SAMX7X)
144 #define TUP_DCD_ENDPOINT_MAX 10
145 #define TUP_RHPORT_HIGHSPEED 1
146 #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
147
148#elif TU_CHECK_MCU(OPT_MCU_PIC32MZ)
149 #define TUP_DCD_ENDPOINT_MAX 8
150 #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
151
152#elif TU_CHECK_MCU(OPT_MCU_PIC32MX, OPT_MCU_PIC32MM, OPT_MCU_PIC32MK) || \
153 TU_CHECK_MCU(OPT_MCU_PIC24, OPT_MCU_DSPIC33)
154 #define TUP_DCD_ENDPOINT_MAX 16
155 #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
156
157//--------------------------------------------------------------------+
158// ST
159//--------------------------------------------------------------------+
160#elif TU_CHECK_MCU(OPT_MCU_STM32F0)
161 #define TUP_USBIP_FSDEV
162 #define TUP_USBIP_FSDEV_STM32
163 #define TUP_DCD_ENDPOINT_MAX 8
164
165#elif TU_CHECK_MCU(OPT_MCU_STM32F1)
166 // - F102, F103 use fsdev
167 // - F105, F107 use dwc2
168 #if defined (STM32F105x8) || defined (STM32F105xB) || defined (STM32F105xC) || \
169 defined (STM32F107xB) || defined (STM32F107xC)
170 #define TUP_USBIP_DWC2
171 #define TUP_USBIP_DWC2_STM32
172 #define CFG_TUH_DWC2_DMA_ENABLE_DEFAULT 0
173
174 #define TUP_DCD_ENDPOINT_MAX 4
175 #elif defined(STM32F102x6) || defined(STM32F102xB) || \
176 defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)
177 #define TUP_USBIP_FSDEV
178 #define TUP_USBIP_FSDEV_STM32
179 #define TUP_DCD_ENDPOINT_MAX 8
180 #else
181 #error "Unsupported STM32F1 mcu"
182 #endif
183
184#elif TU_CHECK_MCU(OPT_MCU_STM32F2)
185 #define TUP_USBIP_DWC2
186 #define TUP_USBIP_DWC2_STM32
187
188 // FS has 4 ep, HS has 5 ep
189 #define TUP_DCD_ENDPOINT_MAX 6
190
191#elif TU_CHECK_MCU(OPT_MCU_STM32F3)
192 #define TUP_USBIP_FSDEV
193 #define TUP_USBIP_FSDEV_STM32
194 #define TUP_DCD_ENDPOINT_MAX 8
195
196#elif TU_CHECK_MCU(OPT_MCU_STM32F4)
197 #define TUP_USBIP_DWC2
198 #define TUP_USBIP_DWC2_STM32
199
200 // For most mcu, FS has 4, HS has 6. TODO 446/469/479 HS has 9
201 #define TUP_DCD_ENDPOINT_MAX 6
202
203#elif TU_CHECK_MCU(OPT_MCU_STM32F7)
204 #define TUP_USBIP_DWC2
205 #define TUP_USBIP_DWC2_STM32
206
207 // FS has 6, HS has 9
208 #define TUP_DCD_ENDPOINT_MAX 9
209
210 // MCU with on-chip HS Phy
211 #if defined(STM32F723xx) || defined(STM32F730xx) || defined(STM32F733xx)
212 #define TUP_RHPORT_HIGHSPEED 1 // Port0: FS, Port1: HS
213 #endif
214
215#elif TU_CHECK_MCU(OPT_MCU_STM32H7)
216 #define TUP_USBIP_DWC2
217 #define TUP_USBIP_DWC2_STM32
218
219 #define TUP_DCD_ENDPOINT_MAX 9
220
221#elif TU_CHECK_MCU(OPT_MCU_STM32H5)
222 #define TUP_USBIP_FSDEV
223 #define TUP_USBIP_FSDEV_STM32
224 #define TUP_DCD_ENDPOINT_MAX 8
225
226#elif TU_CHECK_MCU(OPT_MCU_STM32G4)
227 // Device controller
228 #define TUP_USBIP_FSDEV
229 #define TUP_USBIP_FSDEV_STM32
230
231 // TypeC controller
232 #define TUP_USBIP_TYPEC_STM32
233 #define TUP_DCD_ENDPOINT_MAX 8
234 #define TUP_TYPEC_RHPORTS_NUM 1
235
236#elif TU_CHECK_MCU(OPT_MCU_STM32G0)
237 #define TUP_USBIP_FSDEV
238 #define TUP_USBIP_FSDEV_STM32
239 #define TUP_DCD_ENDPOINT_MAX 8
240
241#elif TU_CHECK_MCU(OPT_MCU_STM32L0, OPT_MCU_STM32L1)
242 #define TUP_USBIP_FSDEV
243 #define TUP_USBIP_FSDEV_STM32
244 #define TUP_DCD_ENDPOINT_MAX 8
245
246#elif TU_CHECK_MCU(OPT_MCU_STM32L4)
247 // - L4x2, L4x3 use fsdev
248 // - L4x4, L4x6, L4x7, L4x9 use dwc2
249 #if defined (STM32L475xx) || defined (STM32L476xx) || \
250 defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || \
251 defined (STM32L4A6xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || \
252 defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || \
253 defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)
254 #define TUP_USBIP_DWC2
255 #define TUP_USBIP_DWC2_STM32
256
257 #define TUP_DCD_ENDPOINT_MAX 6
258 #elif defined(STM32L412xx) || defined(STM32L422xx) || defined(STM32L432xx) || defined(STM32L433xx) || \
259 defined(STM32L442xx) || defined(STM32L443xx) || defined(STM32L452xx) || defined(STM32L462xx)
260 #define TUP_USBIP_FSDEV
261 #define TUP_USBIP_FSDEV_STM32
262 #define TUP_DCD_ENDPOINT_MAX 8
263 #else
264 #error "Unsupported STM32L4 mcu"
265 #endif
266
267#elif TU_CHECK_MCU(OPT_MCU_STM32WB)
268 #define TUP_USBIP_FSDEV
269 #define TUP_USBIP_FSDEV_STM32
270 #define TUP_DCD_ENDPOINT_MAX 8
271
272#elif TU_CHECK_MCU(OPT_MCU_STM32U5)
273 #if defined (STM32U535xx) || defined (STM32U545xx)
274 #define TUP_USBIP_FSDEV
275 #define TUP_USBIP_FSDEV_STM32
276 #define TUP_DCD_ENDPOINT_MAX 8
277
278 #else
279 #define TUP_USBIP_DWC2
280 #define TUP_USBIP_DWC2_STM32
281
282 // U59x/5Ax/5Fx/5Gx are highspeed with built-in HS PHY
283 #if defined(STM32U595xx) || defined(STM32U599xx) || defined(STM32U5A5xx) || defined(STM32U5A9xx) || \
284 defined(STM32U5F7xx) || defined(STM32U5F9xx) || defined(STM32U5G7xx) || defined(STM32U5G9xx)
285 #define TUP_DCD_ENDPOINT_MAX 9
286 #define TUP_RHPORT_HIGHSPEED 1
287 #else
288 #define TUP_DCD_ENDPOINT_MAX 6
289 #endif
290 #endif
291
292#elif TU_CHECK_MCU(OPT_MCU_STM32L5)
293 #define TUP_USBIP_FSDEV
294 #define TUP_USBIP_FSDEV_STM32
295 #define TUP_DCD_ENDPOINT_MAX 8
296
297#elif TU_CHECK_MCU(OPT_MCU_STM32U0)
298 #define TUP_USBIP_FSDEV
299 #define TUP_USBIP_FSDEV_STM32
300 #define TUP_DCD_ENDPOINT_MAX 8
301
302#elif TU_CHECK_MCU(OPT_MCU_STM32H7RS)
303 #define TUP_USBIP_DWC2
304 #define TUP_USBIP_DWC2_STM32
305
306 // FS has 6, HS has 9
307 #define TUP_DCD_ENDPOINT_MAX 9
308
309 // MCU with on-chip HS Phy
310 #define TUP_RHPORT_HIGHSPEED 1
311
312//--------------------------------------------------------------------+
313// Sony
314//--------------------------------------------------------------------+
315#elif TU_CHECK_MCU(OPT_MCU_CXD56)
316 #define TUP_DCD_ENDPOINT_MAX 7
317 #define TUP_RHPORT_HIGHSPEED 1
318 #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
319
320//--------------------------------------------------------------------+
321// TI
322//--------------------------------------------------------------------+
323#elif TU_CHECK_MCU(OPT_MCU_MSP430x5xx)
324 #define TUP_DCD_ENDPOINT_MAX 8
325
326#elif TU_CHECK_MCU(OPT_MCU_MSP432E4, OPT_MCU_TM4C123, OPT_MCU_TM4C129)
327 #define TUP_USBIP_MUSB
328 #define TUP_USBIP_MUSB_TI
329 #define TUP_DCD_ENDPOINT_MAX 8
330
331//--------------------------------------------------------------------+
332// ValentyUSB (Litex)
333//--------------------------------------------------------------------+
334#elif TU_CHECK_MCU(OPT_MCU_VALENTYUSB_EPTRI)
335 #define TUP_DCD_ENDPOINT_MAX 16
336
337//--------------------------------------------------------------------+
338// Nuvoton
339//--------------------------------------------------------------------+
340#elif TU_CHECK_MCU(OPT_MCU_NUC121, OPT_MCU_NUC126)
341 #define TUP_DCD_ENDPOINT_MAX 8
342
343#elif TU_CHECK_MCU(OPT_MCU_NUC120)
344 #define TUP_DCD_ENDPOINT_MAX 6
345
346#elif TU_CHECK_MCU(OPT_MCU_NUC505)
347 #define TUP_DCD_ENDPOINT_MAX 12
348 #define TUP_RHPORT_HIGHSPEED 1
349
350//--------------------------------------------------------------------+
351// Espressif
352//--------------------------------------------------------------------+
353#elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
354 #define TUP_USBIP_DWC2
355 #define TUP_USBIP_DWC2_ESP32
356 #define TUP_DCD_ENDPOINT_MAX 7 // only 5 TX FIFO for endpoint IN
357 #define CFG_TUH_DWC2_DMA_ENABLE_DEFAULT 0 // TODO currently have issue with buffer DMA with espressif
358
359#elif TU_CHECK_MCU(OPT_MCU_ESP32P4)
360 #define TUP_USBIP_DWC2
361 #define TUP_USBIP_DWC2_ESP32
362 #define TUP_RHPORT_HIGHSPEED 1 // port0 FS, port1 HS
363 #define TUP_DCD_ENDPOINT_MAX 16 // FS 7 ep, HS 16 ep
364 #define CFG_TUH_DWC2_DMA_ENABLE_DEFAULT 0 // TODO currently have issue with buffer DMA with espressif
365
366#elif TU_CHECK_MCU(OPT_MCU_ESP32, OPT_MCU_ESP32C2, OPT_MCU_ESP32C3, OPT_MCU_ESP32C6, OPT_MCU_ESP32H2)
367 #if (CFG_TUD_ENABLED || !(defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421))
368 #error "MCUs are only supported with CFG_TUH_MAX3421 enabled"
369 #endif
370 #define TUP_DCD_ENDPOINT_MAX 0
371
372//--------------------------------------------------------------------+
373// Dialog
374//--------------------------------------------------------------------+
375#elif TU_CHECK_MCU(OPT_MCU_DA1469X)
376 #define TUP_DCD_ENDPOINT_MAX 4
377
378//--------------------------------------------------------------------+
379// Raspberry Pi
380//--------------------------------------------------------------------+
381#elif TU_CHECK_MCU(OPT_MCU_RP2040)
382 #define TUP_DCD_ENDPOINT_MAX 16
383
384 #define TU_ATTR_FAST_FUNC __attribute__((section(".time_critical.tinyusb")))
385
386//--------------------------------------------------------------------+
387// Silabs
388//--------------------------------------------------------------------+
389#elif TU_CHECK_MCU(OPT_MCU_EFM32GG)
390 #define TUP_USBIP_DWC2
391 #define TUP_DCD_ENDPOINT_MAX 7
392
393//--------------------------------------------------------------------+
394// Renesas
395//--------------------------------------------------------------------+
396#elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N, OPT_MCU_RAXXX)
397 #define TUP_USBIP_RUSB2
398 #define TUP_DCD_ENDPOINT_MAX 10
399
400//--------------------------------------------------------------------+
401// GigaDevice
402//--------------------------------------------------------------------+
403#elif TU_CHECK_MCU(OPT_MCU_GD32VF103)
404 #define TUP_USBIP_DWC2
405 #define TUP_DCD_ENDPOINT_MAX 4
406
407//--------------------------------------------------------------------+
408// Broadcom
409//--------------------------------------------------------------------+
410#elif TU_CHECK_MCU(OPT_MCU_BCM2711, OPT_MCU_BCM2835, OPT_MCU_BCM2837)
411 #define TUP_USBIP_DWC2
412 #define TUP_DCD_ENDPOINT_MAX 8
413 #define TUP_RHPORT_HIGHSPEED 1
414
415//--------------------------------------------------------------------+
416// Infineon
417//--------------------------------------------------------------------+
418#elif TU_CHECK_MCU(OPT_MCU_XMC4000)
419 #define TUP_USBIP_DWC2
420 #define TUP_DCD_ENDPOINT_MAX 8
421
422//--------------------------------------------------------------------+
423// BridgeTek
424//--------------------------------------------------------------------+
425#elif TU_CHECK_MCU(OPT_MCU_FT90X)
426 #define TUP_DCD_ENDPOINT_MAX 8
427 #define TUP_RHPORT_HIGHSPEED 1
428 #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
429
430#elif TU_CHECK_MCU(OPT_MCU_FT93X)
431 #define TUP_DCD_ENDPOINT_MAX 16
432 #define TUP_RHPORT_HIGHSPEED 1
433 #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
434
435//--------------------------------------------------------------------+
436// Allwinner
437//--------------------------------------------------------------------+
438#elif TU_CHECK_MCU(OPT_MCU_F1C100S)
439 #define TUP_DCD_ENDPOINT_MAX 4
440
441//--------------------------------------------------------------------+
442// WCH
443//--------------------------------------------------------------------+
444#elif TU_CHECK_MCU(OPT_MCU_CH32F20X)
445 #define TUP_USBIP_WCH_USBHS
446 #define TUP_USBIP_WCH_USBFS
447
448 #if !defined(CFG_TUD_WCH_USBIP_USBFS)
449 #define CFG_TUD_WCH_USBIP_USBFS 0
450 #endif
451
452 #if !defined(CFG_TUD_WCH_USBIP_USBHS)
453 #define CFG_TUD_WCH_USBIP_USBHS (CFG_TUD_WCH_USBIP_USBFS ? 0 : 1)
454 #endif
455
456 #define TUP_RHPORT_HIGHSPEED CFG_TUD_WCH_USBIP_USBHS
457 #define TUP_DCD_ENDPOINT_MAX (CFG_TUD_WCH_USBIP_USBHS ? 16 : 8)
458
459#elif TU_CHECK_MCU(OPT_MCU_CH32V103)
460 #define TUP_USBIP_WCH_USBFS
461
462 #if !defined(CFG_TUD_WCH_USBIP_USBFS)
463 #define CFG_TUD_WCH_USBIP_USBFS 1
464 #endif
465
466 #define TUP_DCD_ENDPOINT_MAX 8
467
468#elif TU_CHECK_MCU(OPT_MCU_CH32V20X)
469 // v20x support both FSDEV (USBD) and USBFS, default to FSDEV
470 #define TUP_USBIP_WCH_USBFS
471 #define TUP_USBIP_FSDEV
472 #define TUP_USBIP_FSDEV_CH32
473
474 #if !defined(CFG_TUD_WCH_USBIP_USBFS)
475 #define CFG_TUD_WCH_USBIP_USBFS 0
476 #endif
477
478 #if !defined(CFG_TUD_WCH_USBIP_FSDEV)
479 #define CFG_TUD_WCH_USBIP_FSDEV (CFG_TUD_WCH_USBIP_USBFS ? 0 : 1)
480 #endif
481
482 #define TUP_DCD_ENDPOINT_MAX 8
483
484#elif TU_CHECK_MCU(OPT_MCU_CH32V307)
485 // v307 support both FS and HS, default to HS
486 #define TUP_USBIP_WCH_USBHS
487 #define TUP_USBIP_WCH_USBFS
488
489 #if !defined(CFG_TUD_WCH_USBIP_USBFS)
490 #define CFG_TUD_WCH_USBIP_USBFS 0
491 #endif
492
493 #if !defined(CFG_TUD_WCH_USBIP_USBHS)
494 #define CFG_TUD_WCH_USBIP_USBHS (CFG_TUD_WCH_USBIP_USBFS ? 0 : 1)
495 #endif
496
497 #define TUP_RHPORT_HIGHSPEED CFG_TUD_WCH_USBIP_USBHS
498 #define TUP_DCD_ENDPOINT_MAX (CFG_TUD_WCH_USBIP_USBHS ? 16 : 8)
499
500//--------------------------------------------------------------------+
501// Analog Devices
502//--------------------------------------------------------------------+
503#elif TU_CHECK_MCU(OPT_MCU_MAX32650, OPT_MCU_MAX32666, OPT_MCU_MAX32690, OPT_MCU_MAX78002)
504 #define TUP_USBIP_MUSB
505 #define TUP_USBIP_MUSB_ADI
506 #define TUP_DCD_ENDPOINT_MAX 12
507 #define TUP_RHPORT_HIGHSPEED 1
508 #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
509
510#endif
511
512//--------------------------------------------------------------------+
513// External USB controller
514//--------------------------------------------------------------------+
515
516#if defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
517 #ifndef CFG_TUH_MAX3421_ENDPOINT_TOTAL
518 #define CFG_TUH_MAX3421_ENDPOINT_TOTAL (8 + 4*(CFG_TUH_DEVICE_MAX-1))
519 #endif
520#endif
521
522
523//--------------------------------------------------------------------+
524// Default Values
525//--------------------------------------------------------------------+
526
527#ifndef TUP_MCU_MULTIPLE_CORE
528#define TUP_MCU_MULTIPLE_CORE 0
529#endif
530
531#if !defined(TUP_DCD_ENDPOINT_MAX) && defined(CFG_TUD_ENABLED) && CFG_TUD_ENABLED
532 #warning "TUP_DCD_ENDPOINT_MAX is not defined for this MCU, default to 8"
533 #define TUP_DCD_ENDPOINT_MAX 8
534#endif
535
536// Default to fullspeed if not defined
537#ifndef TUP_RHPORT_HIGHSPEED
538 #define TUP_RHPORT_HIGHSPEED 0
539#endif
540
541// fast function, normally mean placing function in SRAM
542#ifndef TU_ATTR_FAST_FUNC
543 #define TU_ATTR_FAST_FUNC
544#endif
545
546// USBIP that support ISO alloc & activate API
547#if defined(TUP_USBIP_DWC2) || defined(TUP_USBIP_FSDEV) || defined(TUP_USBIP_MUSB)
548 #define TUP_DCD_EDPT_ISO_ALLOC
549#endif
550
551#if defined(TUP_USBIP_DWC2) // && CFG_TUD_DWC2_DMA == 0
552 #define TUP_MEM_CONST_ADDR
553#endif
554
555#endif