Open FFBoard
Open source force feedback firmware
rusb2_ra.h
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1/*
2 * The MIT License (MIT)
3 *
4 * Copyright (c) 2022 Rafael Silva (@perigoso)
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 *
24 * This file is part of the TinyUSB stack.
25 */
26
27#ifndef _RUSB2_RA_H_
28#define _RUSB2_RA_H_
29
30#ifdef __cplusplus
31extern "C" {
32#endif
33
34#ifdef __GNUC__
35#pragma GCC diagnostic push
36#pragma GCC diagnostic ignored "-Wstrict-prototypes"
37#pragma GCC diagnostic ignored "-Wundef"
38
39// extra push due to https://github.com/renesas/fsp/pull/278
40#pragma GCC diagnostic push
41#endif
42
43/* renesas fsp api */
44#include "bsp_api.h"
45
46#ifdef __GNUC__
47#pragma GCC diagnostic pop
48#endif
49
50// IAR does not have __builtin_ctz
51#if defined(__ICCARM__)
52 #define __builtin_ctz(x) __iar_builtin_CLZ(__iar_builtin_RBIT(x))
53#endif
54
55//--------------------------------------------------------------------+
56//
57//--------------------------------------------------------------------+
58
59typedef struct {
60 uint32_t reg_base;
61 int32_t irqnum;
63
64#if defined(BSP_MCU_GROUP_RA6M5) || defined(BSP_MCU_GROUP_RA6M3) || (BSP_CFG_MCU_PART_SERIES == 8)
65 #define RUSB2_SUPPORT_HIGHSPEED
66 #define RUSB2_CONTROLLER_COUNT 2
67
68 #define rusb2_is_highspeed_rhport(_p) (_p == 1)
69 #define rusb2_is_highspeed_reg(_reg) (_reg == RUSB2_REG(1))
70#else
71 #define RUSB2_CONTROLLER_COUNT 1
72
73 #define rusb2_is_highspeed_rhport(_p) (false)
74 #define rusb2_is_highspeed_reg(_reg) (false)
75#endif
76
78#define RUSB2_REG(_p) ((rusb2_reg_t*) rusb2_controller[_p].reg_base)
79
80//--------------------------------------------------------------------+
81// RUSB2 API
82//--------------------------------------------------------------------+
83
84TU_ATTR_ALWAYS_INLINE static inline void rusb2_module_start(uint8_t rhport, bool start) {
85 uint32_t const mask = 1U << (11+rhport);
86 if (start) {
87 R_MSTP->MSTPCRB &= ~mask;
88 }else {
89 R_MSTP->MSTPCRB |= mask;
90 }
91}
92
93TU_ATTR_ALWAYS_INLINE static inline void rusb2_int_enable(uint8_t rhport) {
94 NVIC_EnableIRQ(rusb2_controller[rhport].irqnum);
95}
96
97TU_ATTR_ALWAYS_INLINE static inline void rusb2_int_disable(uint8_t rhport) {
98 NVIC_DisableIRQ(rusb2_controller[rhport].irqnum);
99}
100
101// MCU specific PHY init
102TU_ATTR_ALWAYS_INLINE static inline void rusb2_phy_init(void) {
103}
104
105#ifdef __cplusplus
106}
107#endif
108
109#endif /* _RUSB2_RA_H_ */
static TU_ATTR_ALWAYS_INLINE void rusb2_phy_init(void)
Definition: rusb2_ra.h:102
static TU_ATTR_ALWAYS_INLINE void rusb2_int_disable(uint8_t rhport)
Definition: rusb2_ra.h:97
rusb2_controller_t rusb2_controller[]
Definition: rusb2_common.c:40
static TU_ATTR_ALWAYS_INLINE void rusb2_module_start(uint8_t rhport, bool start)
Definition: rusb2_ra.h:84
static TU_ATTR_ALWAYS_INLINE void rusb2_int_enable(uint8_t rhport)
Definition: rusb2_ra.h:93
uint32_t reg_base
Definition: rusb2_ra.h:60
int32_t irqnum
Definition: rusb2_ra.h:61