Open FFBoard
Open source force feedback firmware
hcd_ci_hs.c
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1/*
2 * The MIT License (MIT)
3 *
4 * Copyright (c) 2019 Ha Thach (tinyusb.org)
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 *
24 * This file is part of the TinyUSB stack.
25 */
26
27#include "tusb_option.h"
28
29// Chipidea Highspeed USB IP implement EHCI for host functionality
30
31#if CFG_TUH_ENABLED && defined(TUP_USBIP_EHCI)
32
33//--------------------------------------------------------------------+
34// INCLUDE
35//--------------------------------------------------------------------+
36#include "common/tusb_common.h"
37#include "host/hcd.h"
39#include "ci_hs_type.h"
40
41#if CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX
42
43#include "ci_hs_imxrt.h"
44
45bool hcd_dcache_clean(void const* addr, uint32_t data_size) {
46 return imxrt_dcache_clean(addr, data_size);
47}
48
49bool hcd_dcache_invalidate(void const* addr, uint32_t data_size) {
50 return imxrt_dcache_invalidate(addr, data_size);
51}
52
53bool hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
54 return imxrt_dcache_clean_invalidate(addr, data_size);
55}
56
57#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
58
59#include "ci_hs_lpc18_43.h"
60
61#else
62#error "Unsupported MCUs"
63#endif
64
65//--------------------------------------------------------------------+
66// MACRO CONSTANT TYPEDEF
67//--------------------------------------------------------------------+
68
69//--------------------------------------------------------------------+
70// Controller API
71//--------------------------------------------------------------------+
72
73bool hcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
74 (void) rh_init;
75 ci_hs_regs_t *hcd_reg = CI_HS_REG(rhport);
76
77 // Reset controller
78 hcd_reg->USBCMD |= USBCMD_RESET;
79 while ( hcd_reg->USBCMD & USBCMD_RESET ) {}
80
81 // Set mode to device, must be set immediately after reset
82#if CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX
83 // LPC18XX/43XX need to set VBUS Power Select to HIGH
84 // RHPORT1 is fullspeed only (need external PHY for Highspeed)
86 if (rhport == 1) {
88 }
89#else
90 hcd_reg->USBMODE = USBMODE_CM_HOST;
91#endif
92
93 // FIXME force full speed, still have issue with Highspeed enumeration
94 // probably due to physical connection bouncing when plug/unplug
95 // 1. Have issue when plug/unplug devices, maybe the port is not reset properly
96 // 2. Also does not seems to detect disconnection
98
99 return ehci_init(rhport, (uint32_t) &hcd_reg->CAPLENGTH, (uint32_t) &hcd_reg->USBCMD);
100}
101
102void hcd_int_enable(uint8_t rhport) {
103 CI_HCD_INT_ENABLE(rhport);
104}
105
106void hcd_int_disable(uint8_t rhport) {
107 CI_HCD_INT_DISABLE(rhport);
108}
109
110#endif
static TU_ATTR_ALWAYS_INLINE bool imxrt_dcache_invalidate(void const *addr, uint32_t data_size)
Definition: ci_hs_imxrt.h:80
static TU_ATTR_ALWAYS_INLINE bool imxrt_dcache_clean(void const *addr, uint32_t data_size)
Definition: ci_hs_imxrt.h:71
static TU_ATTR_ALWAYS_INLINE bool imxrt_dcache_clean_invalidate(void const *addr, uint32_t data_size)
Definition: ci_hs_imxrt.h:92
static TU_ATTR_ALWAYS_INLINE ci_hs_regs_t * CI_HS_REG(uint8_t port)
Definition: ci_hs_mcx.h:40
@ PORTSC1_FORCE_FULL_SPEED
Definition: ci_hs_type.h:58
@ USBCMD_RESET
Definition: ci_hs_type.h:42
@ USBMODE_CM_HOST
Definition: ci_hs_type.h:85
@ USBMODE_VBUS_POWER_SELECT
Definition: ci_hs_type.h:90
bool ehci_init(uint8_t rhport, uint32_t capability_reg, uint32_t operatial_reg)
Definition: ehci.c:295
void hcd_int_disable(uint8_t rhport)
Definition: hcd_ci_hs.c:106
void hcd_int_enable(uint8_t rhport)
Definition: hcd_ci_hs.c:102
bool hcd_dcache_clean(void const *addr, uint32_t data_size)
Definition: hcd_ci_hs.c:45
bool hcd_dcache_invalidate(void const *addr, uint32_t data_size)
Definition: hcd_ci_hs.c:49
bool hcd_dcache_clean_invalidate(void const *addr, uint32_t data_size)
Definition: hcd_ci_hs.c:53
bool hcd_init(uint8_t rhport, const tusb_rhport_init_t *rh_init)
Definition: hcd_ci_hs.c:73
volatile uint32_t PORTSC1
Port Status & Control.
Definition: ci_hs_type.h:129
volatile uint8_t CAPLENGTH
Capability Registers Length.
Definition: ci_hs_type.h:100
volatile uint32_t USBCMD
USB Command Register.
Definition: ci_hs_type.h:115
volatile uint32_t USBMODE
USB Device Mode.
Definition: ci_hs_type.h:132