Open FFBoard
Open source force feedback firmware
fsdev_ch32.h
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1/*
2* The MIT License (MIT)
3 *
4 * Copyright (c) 2024, hathach (tinyusb.org)
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 *
24 */
34#ifndef TUSB_FSDEV_CH32_H
35#define TUSB_FSDEV_CH32_H
36
38
39// https://github.com/openwch/ch32v307/pull/90
40// https://github.com/openwch/ch32v20x/pull/12
41#ifdef __GNUC__
42#pragma GCC diagnostic push
43#pragma GCC diagnostic ignored "-Wstrict-prototypes"
44#endif
45
46#if CFG_TUSB_MCU == OPT_MCU_CH32F20X
47 #include <ch32f20x.h>
48#elif CFG_TUSB_MCU == OPT_MCU_CH32V20X
49 #include <ch32v20x.h>
50#endif
51
52#ifdef __GNUC__
53#pragma GCC diagnostic pop
54#endif
55
56#define FSDEV_PMA_SIZE (512u)
57#define FSDEV_REG_BASE (APB1PERIPH_BASE + 0x00005C00UL)
58#define FSDEV_PMA_BASE (APB1PERIPH_BASE + 0x00006000UL)
59
60/**************************** ISTR interrupt events *************************/
61#define USB_ISTR_CTR ((uint16_t)0x8000U)
62#define USB_ISTR_PMAOVR ((uint16_t)0x4000U)
63#define USB_ISTR_ERR ((uint16_t)0x2000U)
64#define USB_ISTR_WKUP ((uint16_t)0x1000U)
65#define USB_ISTR_SUSP ((uint16_t)0x0800U)
66#define USB_ISTR_RESET ((uint16_t)0x0400U)
67#define USB_ISTR_SOF ((uint16_t)0x0200U)
68#define USB_ISTR_ESOF ((uint16_t)0x0100U)
69#define USB_ISTR_DIR ((uint16_t)0x0010U)
70#define USB_ISTR_EP_ID ((uint16_t)0x000FU)
72/* Legacy defines */
73#define USB_ISTR_PMAOVRM USB_ISTR_PMAOVR
74
75#define USB_CLR_CTR (~USB_ISTR_CTR)
76#define USB_CLR_PMAOVR (~USB_ISTR_PMAOVR)
77#define USB_CLR_ERR (~USB_ISTR_ERR)
78#define USB_CLR_WKUP (~USB_ISTR_WKUP)
79#define USB_CLR_SUSP (~USB_ISTR_SUSP)
80#define USB_CLR_RESET (~USB_ISTR_RESET)
81#define USB_CLR_SOF (~USB_ISTR_SOF)
82#define USB_CLR_ESOF (~USB_ISTR_ESOF)
84/* Legacy defines */
85#define USB_CLR_PMAOVRM USB_CLR_PMAOVR
86
87/************************* CNTR control register bits definitions ***********/
88#define USB_CNTR_CTRM ((uint16_t)0x8000U)
89#define USB_CNTR_PMAOVR ((uint16_t)0x4000U)
90#define USB_CNTR_ERRM ((uint16_t)0x2000U)
91#define USB_CNTR_WKUPM ((uint16_t)0x1000U)
92#define USB_CNTR_SUSPM ((uint16_t)0x0800U)
93#define USB_CNTR_RESETM ((uint16_t)0x0400U)
94#define USB_CNTR_SOFM ((uint16_t)0x0200U)
95#define USB_CNTR_ESOFM ((uint16_t)0x0100U)
96#define USB_CNTR_RESUME ((uint16_t)0x0010U)
97#define USB_CNTR_FSUSP ((uint16_t)0x0008U)
98#define USB_CNTR_LPMODE ((uint16_t)0x0004U)
99#define USB_CNTR_PDWN ((uint16_t)0x0002U)
100#define USB_CNTR_FRES ((uint16_t)0x0001U)
102/* Legacy defines */
103#define USB_CNTR_PMAOVRM USB_CNTR_PMAOVR
104#define USB_CNTR_LP_MODE USB_CNTR_LPMODE
105
106/******************** FNR Frame Number Register bit definitions ************/
107#define USB_FNR_RXDP ((uint16_t)0x8000U)
108#define USB_FNR_RXDM ((uint16_t)0x4000U)
109#define USB_FNR_LCK ((uint16_t)0x2000U)
110#define USB_FNR_LSOF ((uint16_t)0x1800U)
111#define USB_FNR_FN ((uint16_t)0x07FFU)
113/******************** DADDR Device ADDRess bit definitions ****************/
114#define USB_DADDR_EF ((uint8_t)0x80U)
115#define USB_DADDR_ADD ((uint8_t)0x7FU)
117/****************************** Endpoint register *************************/
118#define USB_EP0R USB_BASE
119#define USB_EP1R (USB_BASE + 0x04U)
120#define USB_EP2R (USB_BASE + 0x08U)
121#define USB_EP3R (USB_BASE + 0x0CU)
122#define USB_EP4R (USB_BASE + 0x10U)
123#define USB_EP5R (USB_BASE + 0x14U)
124#define USB_EP6R (USB_BASE + 0x18U)
125#define USB_EP7R (USB_BASE + 0x1CU)
126/* bit positions */
127#define USB_EP_CTR_RX ((uint16_t)0x8000U)
128#define USB_EP_DTOG_RX ((uint16_t)0x4000U)
129#define USB_EPRX_STAT ((uint16_t)0x3000U)
130#define USB_EP_SETUP ((uint16_t)0x0800U)
131#define USB_EP_T_FIELD ((uint16_t)0x0600U)
132#define USB_EP_KIND ((uint16_t)0x0100U)
133#define USB_EP_CTR_TX ((uint16_t)0x0080U)
134#define USB_EP_DTOG_TX ((uint16_t)0x0040U)
135#define USB_EPTX_STAT ((uint16_t)0x0030U)
136#define USB_EPADDR_FIELD ((uint16_t)0x000FU)
138/* EndPoint REGister MASK (no toggle fields) */
139#define USB_EPREG_MASK (USB_EP_CTR_RX|USB_EP_SETUP|USB_EP_T_FIELD|USB_EP_KIND|USB_EP_CTR_TX|USB_EPADDR_FIELD)
141#define USB_EP_TYPE_MASK ((uint16_t)0x0600U)
142#define USB_EP_BULK ((uint16_t)0x0000U)
143#define USB_EP_CONTROL ((uint16_t)0x0200U)
144#define USB_EP_ISOCHRONOUS ((uint16_t)0x0400U)
145#define USB_EP_INTERRUPT ((uint16_t)0x0600U)
146#define USB_EP_T_MASK ((uint16_t) ~USB_EP_T_FIELD & USB_EPREG_MASK)
147
148#define USB_EPKIND_MASK ((uint16_t) ~USB_EP_KIND & USB_EPREG_MASK)
150#define USB_EP_TX_DIS ((uint16_t)0x0000U)
151#define USB_EP_TX_STALL ((uint16_t)0x0010U)
152#define USB_EP_TX_NAK ((uint16_t)0x0020U)
153#define USB_EP_TX_VALID ((uint16_t)0x0030U)
154#define USB_EPTX_DTOG1 ((uint16_t)0x0010U)
155#define USB_EPTX_DTOG2 ((uint16_t)0x0020U)
156#define USB_EPTX_DTOGMASK (USB_EPTX_STAT|USB_EPREG_MASK)
158#define USB_EP_RX_DIS ((uint16_t)0x0000U)
159#define USB_EP_RX_STALL ((uint16_t)0x1000U)
160#define USB_EP_RX_NAK ((uint16_t)0x2000U)
161#define USB_EP_RX_VALID ((uint16_t)0x3000U)
162#define USB_EPRX_DTOG1 ((uint16_t)0x1000U)
163#define USB_EPRX_DTOG2 ((uint16_t)0x2000U)
164#define USB_EPRX_DTOGMASK (USB_EPRX_STAT|USB_EPREG_MASK)
165
166
167//--------------------------------------------------------------------+
168//
169//--------------------------------------------------------------------+
170
171#if CFG_TUSB_MCU == OPT_MCU_CH32V20X
172static const IRQn_Type fsdev_irq[] = {
173 USB_HP_CAN1_TX_IRQn,
174 USB_LP_CAN1_RX0_IRQn,
175 USBWakeUp_IRQn
176};
177enum { FSDEV_IRQ_NUM = TU_ARRAY_SIZE(fsdev_irq) };
178#else
179 #error "Unsupported MCU"
180#endif
181
182void dcd_int_enable(uint8_t rhport) {
183 (void)rhport;
184 for(uint8_t i=0; i < FSDEV_IRQ_NUM; i++) {
185 NVIC_EnableIRQ(fsdev_irq[i]);
186 }
187}
188
189void dcd_int_disable(uint8_t rhport) {
190 (void)rhport;
191 for(uint8_t i=0; i < FSDEV_IRQ_NUM; i++) {
192 NVIC_DisableIRQ(fsdev_irq[i]);
193 }
194}
195
196void dcd_disconnect(uint8_t rhport) {
197 (void) rhport;
198 EXTEN->EXTEN_CTR &= ~EXTEN_USBD_PU_EN;
199}
200
201void dcd_connect(uint8_t rhport) {
202 (void) rhport;
203 EXTEN->EXTEN_CTR |= EXTEN_USBD_PU_EN;
204}
205
206#endif
static const IRQn_Type fsdev_irq[]
Definition: fsdev_ch32.h:174
void dcd_disconnect(uint8_t rhport)
Definition: fsdev_ch32.h:198
void dcd_int_disable(uint8_t rhport)
Definition: fsdev_ch32.h:191
void dcd_connect(uint8_t rhport)
Definition: fsdev_ch32.h:203
@ FSDEV_IRQ_NUM
Definition: fsdev_ch32.h:179
void dcd_int_enable(uint8_t rhport)
Definition: fsdev_ch32.h:184