Open FFBoard
Open source force feedback firmware
dcd_nuc120.c
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1/*
2 * The MIT License (MIT)
3 *
4 * Copyright (c) 2019-2020 Peter Lawrence
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 *
24 * This file is part of the TinyUSB stack.
25 */
26
27/*
28 Theory of operation:
29
30 The NUC100/NUC120 USBD peripheral has six "EP"s, but each is simplex,
31 so two collectively (peripheral nomenclature of "EP0" and "EP1") are needed to
32 implement USB EP0. PERIPH_EP0 and PERIPH_EP1 are used by this driver for
33 EP0_IN and EP0_OUT respectively. This leaves up to four for user usage.
34*/
35
36#include "tusb_option.h"
37
38#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_NUC120)
39
40#include "device/dcd.h"
41#include "NUC100Series.h"
42
43/* allocation of USBD RAM for Setup, EP0_IN, and and EP_OUT */
44#define PERIPH_SETUP_BUF_BASE 0
45#define PERIPH_SETUP_BUF_LEN 8
46#define PERIPH_EP0_BUF_BASE (PERIPH_SETUP_BUF_BASE + PERIPH_SETUP_BUF_LEN)
47#define PERIPH_EP0_BUF_LEN CFG_TUD_ENDPOINT0_SIZE
48#define PERIPH_EP1_BUF_BASE (PERIPH_EP0_BUF_BASE + PERIPH_EP0_BUF_LEN)
49#define PERIPH_EP1_BUF_LEN CFG_TUD_ENDPOINT0_SIZE
50#define PERIPH_EP2_BUF_BASE (PERIPH_EP1_BUF_BASE + PERIPH_EP1_BUF_LEN)
51
52/* rather important info unfortunately not provided by device include files: how much there is */
53#define USBD_BUF_SIZE 512
54
56{
64};
65
66/* set by dcd_set_address() */
67static volatile uint8_t assigned_address;
68
69/* reset by dcd_init(), this is used by dcd_edpt_open() to assign USBD peripheral buffer addresses */
70static uint32_t bufseg_addr;
71
72/* used by dcd_edpt_xfer() and the ISR to reset the data sync (DATA0/DATA1) in an EP0_IN transfer */
73static bool active_ep0_xfer;
74
75/* RAM table needed to track ongoing transfers performed by dcd_edpt_xfer(), dcd_in_xfer(), and the ISR */
76static struct xfer_ctl_t
77{
78 uint8_t *data_ptr; /* data_ptr tracks where to next copy data to (for OUT) or from (for IN) */
79 // tu_fifo_t * ff; /* pointer to FIFO required for dcd_edpt_xfer_fifo() */ // TODO support dcd_edpt_xfer_fifo API
80 union {
81 uint16_t in_remaining_bytes; /* for IN endpoints, we track how many bytes are left to transfer */
82 uint16_t out_bytes_so_far; /* but for OUT endpoints, we track how many bytes we've transferred so far */
83 };
84 uint16_t max_packet_size; /* needed since device driver only finds out this at runtime */
85 uint16_t total_bytes; /* quantity needed to pass as argument to dcd_event_xfer_complete() (for IN endpoints) */
87
88/*
89 local helper functions
90*/
91
92static void usb_attach(void)
93{
94 USBD->DRVSE0 &= ~USBD_DRVSE0_DRVSE0_Msk;
95}
96
97static void usb_detach(void)
98{
99 USBD->DRVSE0 |= USBD_DRVSE0_DRVSE0_Msk;
100}
101
102static inline void usb_memcpy(uint8_t *dest, uint8_t *src, uint16_t size)
103{
104 while(size--) *dest++ = *src++;
105}
106
107static void usb_control_send_zlp(void)
108{
109 USBD->EP[PERIPH_EP0].CFG |= USBD_CFG_DSQ_SYNC_Msk;
110 USBD->EP[PERIPH_EP0].MXPLD = 0;
111}
112
113/* reconstruct ep_addr from particular USB Configuration Register */
114static uint8_t decode_ep_addr(USBD_EP_T *ep)
115{
116 uint8_t ep_addr = ep->CFG & USBD_CFG_EP_NUM_Msk;
117 if ( USBD_CFG_EPMODE_IN == (ep->CFG & USBD_CFG_STATE_Msk) )
118 ep_addr |= TUSB_DIR_IN_MASK;
119 return ep_addr;
120}
121
122/* map 8-bit ep_addr into peripheral endpoint index (PERIPH_EP0...) */
123static USBD_EP_T *ep_entry(uint8_t ep_addr, bool add)
124{
125 USBD_EP_T *ep;
126 enum ep_enum ep_index;
127
128 for (ep_index = PERIPH_EP0, ep = USBD->EP; ep_index < PERIPH_MAX_EP; ep_index++, ep++)
129 {
130 if (add)
131 {
132 /* take first peripheral endpoint that is unused */
133 if (0 == (ep->CFG & USBD_CFG_STATE_Msk)) return ep;
134 }
135 else
136 {
137 /* find a peripheral endpoint that matches ep_addr */
138 uint8_t candidate_ep_addr = decode_ep_addr(ep);
139 if (candidate_ep_addr == ep_addr) return ep;
140 }
141 }
142
143 return NULL;
144}
145
146/* perform an IN endpoint transfer; this is called by dcd_edpt_xfer() and the ISR */
147static void dcd_in_xfer(struct xfer_ctl_t *xfer, USBD_EP_T *ep)
148{
149 uint16_t bytes_now = tu_min16(xfer->in_remaining_bytes, xfer->max_packet_size);
150
151#if 0 // TODO support dcd_edpt_xfer_fifo API
152 if (xfer->ff)
153 {
154 tu_fifo_read_n(xfer->ff, (void *) (USBD_BUF_BASE + ep->BUFSEG), bytes_now);
155 }
156 else
157#endif
158 {
159 // USB SRAM seems to only support byte access and memcpy could possibly do it by words
160 usb_memcpy((uint8_t *)(USBD_BUF_BASE + ep->BUFSEG), xfer->data_ptr, bytes_now);
161 }
162
163 ep->MXPLD = bytes_now;
164}
165
166/* called by dcd_init() as well as by the ISR during a USB bus reset */
167static void bus_reset(void)
168{
169 USBD->STBUFSEG = PERIPH_SETUP_BUF_BASE;
170
171 for (enum ep_enum ep_index = PERIPH_EP0; ep_index < PERIPH_MAX_EP; ep_index++)
172 {
173 USBD->EP[ep_index].CFG = 0;
174 USBD->EP[ep_index].CFGP = 0;
175 }
176
177 /* allocate the default EP0 endpoints */
178
179 USBD->EP[PERIPH_EP0].CFG = USBD_CFG_CSTALL_Msk | USBD_CFG_EPMODE_IN;
180 USBD->EP[PERIPH_EP0].BUFSEG = PERIPH_EP0_BUF_BASE;
181 xfer_table[PERIPH_EP0].max_packet_size = PERIPH_EP0_BUF_LEN;
182
183 USBD->EP[PERIPH_EP1].CFG = USBD_CFG_CSTALL_Msk | USBD_CFG_EPMODE_OUT;
184 USBD->EP[PERIPH_EP1].BUFSEG = PERIPH_EP1_BUF_BASE;
185 xfer_table[PERIPH_EP1].max_packet_size = PERIPH_EP1_BUF_LEN;
186
187 /* USB RAM beyond what we've allocated above is available to the user */
188 bufseg_addr = PERIPH_EP2_BUF_BASE;
189
190 /* Reset USB device address */
191 USBD->FADDR = 0;
192
193 /* reset EP0_IN flag */
194 active_ep0_xfer = false;
195}
196
197/* centralized location for USBD interrupt enable bit mask */
198static const uint32_t enabled_irqs = USBD_INTSTS_FLDET_STS_Msk | USBD_INTSTS_BUS_STS_Msk | USBD_INTSTS_SETUP_Msk | USBD_INTSTS_USB_STS_Msk;
199
200/*
201 NUC100/NUC120 TinyUSB API driver implementation
202*/
203
204bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
205 (void) rhport;
206 (void) rh_init;
207
208 USBD->ATTR = 0x7D0;
209
210 usb_detach();
211
212 bus_reset();
213
214 usb_attach();
215
216 USBD->INTSTS = enabled_irqs;
217 USBD->INTEN = enabled_irqs;
218
219 return true;
220}
221
222void dcd_int_enable(uint8_t rhport)
223{
224 (void) rhport;
225 NVIC_EnableIRQ(USBD_IRQn);
226}
227
228void dcd_int_disable(uint8_t rhport)
229{
230 (void) rhport;
231 NVIC_DisableIRQ(USBD_IRQn);
232}
233
234void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
235{
236 (void) rhport;
237 usb_control_send_zlp(); /* SET_ADDRESS is the one exception where TinyUSB doesn't use dcd_edpt_xfer() to generate a ZLP */
239}
240
241void dcd_remote_wakeup(uint8_t rhport)
242{
243 (void) rhport;
244 USBD->ATTR = USBD_ATTR_RWAKEUP_Msk;
245}
246
247bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
248{
249 (void) rhport;
250
251 USBD_EP_T *ep = ep_entry(p_endpoint_desc->bEndpointAddress, true);
252 TU_ASSERT(ep);
253
254 /* mine the data for the information we need */
255 int const dir = tu_edpt_dir(p_endpoint_desc->bEndpointAddress);
256 int const size = tu_edpt_packet_size(p_endpoint_desc);
257 tusb_xfer_type_t const type = (tusb_xfer_type_t) p_endpoint_desc->bmAttributes.xfer;
258 struct xfer_ctl_t *xfer = &xfer_table[ep - USBD->EP];
259
260 /* allocate buffer from USB RAM */
261 ep->BUFSEG = bufseg_addr;
262 bufseg_addr += size;
263 TU_ASSERT(bufseg_addr <= USBD_BUF_SIZE);
264
265 /* construct USB Configuration Register value and then write it */
266 uint32_t cfg = tu_edpt_number(p_endpoint_desc->bEndpointAddress);
267 cfg |= (TUSB_DIR_IN == dir) ? USBD_CFG_EPMODE_IN : USBD_CFG_EPMODE_OUT;
268 if (TUSB_XFER_ISOCHRONOUS == type)
269 cfg |= USBD_CFG_TYPE_ISO;
270 ep->CFG = cfg;
271
272 /* make a note of the endpoint size */
273 xfer->max_packet_size = size;
274
275 return true;
276}
277
278void dcd_edpt_close_all (uint8_t rhport)
279{
280 (void) rhport;
281 // TODO implement dcd_edpt_close_all()
282}
283
284bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes)
285{
286 (void) rhport;
287
288 /* mine the data for the information we need */
289 tusb_dir_t dir = tu_edpt_dir(ep_addr);
290 USBD_EP_T *ep = ep_entry(ep_addr, false);
291 struct xfer_ctl_t *xfer = &xfer_table[ep - USBD->EP];
292
293 /* store away the information we'll needing now and later */
294 xfer->data_ptr = buffer;
295 // xfer->ff = NULL; // TODO support dcd_edpt_xfer_fifo API
296 xfer->in_remaining_bytes = total_bytes;
297 xfer->total_bytes = total_bytes;
298
299 /* for the first of one or more EP0_IN packets in a message, the first must be DATA1 */
300 if ( (0x80 == ep_addr) && !active_ep0_xfer ) ep->CFG |= USBD_CFG_DSQ_SYNC_Msk;
301
302 if (TUSB_DIR_IN == dir)
303 {
304 dcd_in_xfer(xfer, ep);
305 }
306 else
307 {
308 xfer->out_bytes_so_far = 0;
309 ep->MXPLD = xfer->max_packet_size;
310 }
311
312 return true;
313}
314
315#if 0 // TODO support dcd_edpt_xfer_fifo API
316bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes)
317{
318 (void) rhport;
319
320 /* mine the data for the information we need */
322 USBD_EP_T *ep = ep_entry(ep_addr, false);
323 struct xfer_ctl_t *xfer = &xfer_table[ep - USBD->EP];
324
325 /* store away the information we'll needing now and later */
326 xfer->data_ptr = NULL; // Indicates a FIFO shall be used
327 xfer->ff = ff;
328 xfer->in_remaining_bytes = total_bytes;
329 xfer->total_bytes = total_bytes;
330
331 if (TUSB_DIR_IN == dir)
332 {
333 dcd_in_xfer(xfer, ep);
334 }
335 else
336 {
337 xfer->out_bytes_so_far = 0;
338 ep->MXPLD = xfer->max_packet_size;
339 }
340
341 return true;
342}
343#endif
344
345void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
346{
347 (void) rhport;
348 USBD_EP_T *ep = ep_entry(ep_addr, false);
349 ep->CFGP |= USBD_CFGP_SSTALL_Msk;
350}
351
352void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
353{
354 (void) rhport;
355 USBD_EP_T *ep = ep_entry(ep_addr, false);
356 ep->CFG |= USBD_CFG_CSTALL_Msk;
357}
358
359void dcd_int_handler(uint8_t rhport)
360{
361 (void) rhport;
362
363 uint32_t status = USBD->INTSTS;
364 uint32_t state = USBD->ATTR & 0xf;
365
366 if(status & USBD_INTSTS_FLDET_STS_Msk)
367 {
368 if(USBD->FLDET & USBD_FLDET_FLDET_Msk)
369 {
370 /* USB connect */
371 USBD->ATTR |= USBD_ATTR_USB_EN_Msk | USBD_ATTR_PHY_EN_Msk;
372 }
373 else
374 {
375 /* USB disconnect */
376 USBD->ATTR &= ~USBD_ATTR_USB_EN_Msk;
377 }
378 }
379
380 if(status & USBD_INTSTS_BUS_STS_Msk)
381 {
382 if(state & USBD_STATE_USBRST)
383 {
384 /* USB bus reset */
385 USBD->ATTR |= USBD_ATTR_USB_EN_Msk | USBD_ATTR_PHY_EN_Msk;
386
387 bus_reset();
389 }
390
391 if(state & USBD_STATE_SUSPEND)
392 {
393 /* Enable USB but disable PHY */
394 USBD->ATTR &= ~USBD_ATTR_PHY_EN_Msk;
395 dcd_event_bus_signal(0, DCD_EVENT_SUSPEND, true);
396 }
397
398 if(state & USBD_STATE_RESUME)
399 {
400 /* Enable USB and enable PHY */
401 USBD->ATTR |= USBD_ATTR_USB_EN_Msk | USBD_ATTR_PHY_EN_Msk;
402 dcd_event_bus_signal(0, DCD_EVENT_RESUME, true);
403 }
404 }
405
406 if(status & USBD_INTSTS_SETUP_Msk)
407 {
408 /* clear the data ready flag of control endpoints */
409 USBD->EP[PERIPH_EP0].CFGP |= USBD_CFGP_CLRRDY_Msk;
410 USBD->EP[PERIPH_EP1].CFGP |= USBD_CFGP_CLRRDY_Msk;
411
412 /* get SETUP packet from USB buffer */
413 dcd_event_setup_received(0, (uint8_t *)USBD_BUF_BASE, true);
414 }
415
416 if(status & USBD_INTSTS_USB_STS_Msk)
417 {
418 if (status & (1UL << USBD_INTSTS_EPEVT_Pos)) /* PERIPH_EP0 (EP0_IN) event: this is treated separately from the rest */
419 {
420 /* given ACK from host has happened, we can now set the address (if not already done) */
421 if((USBD->FADDR != assigned_address) && (USBD->FADDR == 0)) USBD->FADDR = assigned_address;
422
423 uint16_t const available_bytes = USBD->EP[PERIPH_EP0].MXPLD;
424
426
427 dcd_event_xfer_complete(0, 0x80, available_bytes, XFER_RESULT_SUCCESS, true);
428 }
429
430 /* service PERIPH_EP1 through PERIPH_EP7 */
431 enum ep_enum ep_index;
432 uint32_t mask;
433 struct xfer_ctl_t *xfer;
434 USBD_EP_T *ep;
435 for (ep_index = PERIPH_EP1, mask = (2UL << USBD_INTSTS_EPEVT_Pos), xfer = &xfer_table[PERIPH_EP1], ep = &USBD->EP[PERIPH_EP1]; ep_index < PERIPH_MAX_EP; ep_index++, mask <<= 1, xfer++, ep++)
436 {
437 if(status & mask)
438 {
439 USBD->INTSTS = mask;
440
441 uint16_t const available_bytes = ep->MXPLD;
442 uint8_t const ep_addr = decode_ep_addr(ep);
443 bool const out_ep = !(ep_addr & TUSB_DIR_IN_MASK);
444
445 if (out_ep)
446 {
447 /* copy the data from the PC to the previously provided buffer */
448#if 0 // // TODO support dcd_edpt_xfer_fifo API
449 if (xfer->ff)
450 {
451 tu_fifo_write_n(xfer->ff, (const void *) (USBD_BUF_BASE + ep->BUFSEG), available_bytes);
452 }
453 else
454#endif
455 {
456 // USB SRAM seems to only support byte access and memcpy could possibly do it by words
457 usb_memcpy(xfer->data_ptr, (uint8_t *)(USBD_BUF_BASE + ep->BUFSEG), available_bytes);
458 xfer->data_ptr += available_bytes;
459 }
460
461 xfer->out_bytes_so_far += available_bytes;
462
463 /* when the transfer is finished, alert TinyUSB; otherwise, accept more data */
464 if ( (xfer->total_bytes == xfer->out_bytes_so_far) || (available_bytes < xfer->max_packet_size) )
465 dcd_event_xfer_complete(0, ep_addr, xfer->out_bytes_so_far, XFER_RESULT_SUCCESS, true);
466 else
467 ep->MXPLD = xfer->max_packet_size;
468 }
469 else
470 {
471 /* update the bookkeeping to reflect the data that has now been sent to the PC */
472 xfer->in_remaining_bytes -= available_bytes;
473
474 xfer->data_ptr += available_bytes;
475
476 /* if more data to send, send it; otherwise, alert TinyUSB that we've finished */
477 if (xfer->in_remaining_bytes)
478 dcd_in_xfer(xfer, ep);
479 else
481 }
482 }
483 }
484 }
485
486 /* acknowledge all interrupts */
487 USBD->INTSTS = status & enabled_irqs;
488}
489
490void dcd_disconnect(uint8_t rhport)
491{
492 (void) rhport;
493 usb_detach();
494}
495
496void dcd_connect(uint8_t rhport)
497{
498 (void) rhport;
499 usb_attach();
500}
501
502void dcd_sof_enable(uint8_t rhport, bool en)
503{
504 (void) rhport;
505 (void) en;
506
507 // TODO implement later
508}
509
510#endif
static TU_ATTR_ALWAYS_INLINE void dcd_event_bus_signal(uint8_t rhport, dcd_eventid_t eid, bool in_isr)
Definition: dcd.h:196
static TU_ATTR_ALWAYS_INLINE void dcd_event_xfer_complete(uint8_t rhport, uint8_t ep_addr, uint32_t xferred_bytes, uint8_t result, bool in_isr)
Definition: dcd.h:222
static TU_ATTR_ALWAYS_INLINE void dcd_event_setup_received(uint8_t rhport, uint8_t const *setup, bool in_isr)
Definition: dcd.h:213
static TU_ATTR_ALWAYS_INLINE void dcd_event_bus_reset(uint8_t rhport, tusb_speed_t speed, bool in_isr)
Definition: dcd.h:204
xfer_td_t xfer[EP_CBI_COUNT+1][2]
Definition: dcd_nrf5x.c:119
static USBD_EP_T * ep_entry(uint8_t ep_addr, bool add)
Definition: dcd_nuc120.c:123
bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t *ff, uint16_t total_bytes)
Definition: dcd_nuc120.c:316
static struct xfer_ctl_t xfer_table[PERIPH_MAX_EP]
ep_enum
Definition: dcd_nuc120.c:56
@ PERIPH_EP5
Definition: dcd_nuc120.c:62
@ PERIPH_EP2
Definition: dcd_nuc120.c:59
@ PERIPH_EP3
Definition: dcd_nuc120.c:60
@ PERIPH_EP4
Definition: dcd_nuc120.c:61
@ PERIPH_EP0
Definition: dcd_nuc120.c:57
@ PERIPH_MAX_EP
Definition: dcd_nuc120.c:63
@ PERIPH_EP1
Definition: dcd_nuc120.c:58
void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
Definition: dcd_nuc120.c:345
static void usb_detach(void)
Definition: dcd_nuc120.c:97
static void bus_reset(void)
Definition: dcd_nuc120.c:167
static void usb_control_send_zlp(void)
Definition: dcd_nuc120.c:107
void dcd_int_handler(uint8_t rhport)
Definition: dcd_nuc120.c:359
static void dcd_in_xfer(struct xfer_ctl_t *xfer, USBD_EP_T *ep)
Definition: dcd_nuc120.c:147
void dcd_disconnect(uint8_t rhport)
Definition: dcd_nuc120.c:490
static void usb_memcpy(uint8_t *dest, uint8_t *src, uint16_t size)
Definition: dcd_nuc120.c:102
void dcd_edpt_close_all(uint8_t rhport)
Definition: dcd_nuc120.c:278
void dcd_int_disable(uint8_t rhport)
Definition: dcd_nuc120.c:228
bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *p_endpoint_desc)
Definition: dcd_nuc120.c:247
static void usb_attach(void)
Definition: dcd_nuc120.c:92
void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
Definition: dcd_nuc120.c:352
static uint8_t decode_ep_addr(USBD_EP_T *ep)
Definition: dcd_nuc120.c:114
void dcd_connect(uint8_t rhport)
Definition: dcd_nuc120.c:496
bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes)
Definition: dcd_nuc120.c:284
static const uint32_t enabled_irqs
Definition: dcd_nuc120.c:198
static uint32_t bufseg_addr
Definition: dcd_nuc120.c:70
static volatile uint8_t assigned_address
Definition: dcd_nuc120.c:67
void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
Definition: dcd_nuc120.c:234
bool dcd_init(uint8_t rhport, const tusb_rhport_init_t *rh_init)
Definition: dcd_nuc120.c:204
void dcd_int_enable(uint8_t rhport)
Definition: dcd_nuc120.c:222
void dcd_remote_wakeup(uint8_t rhport)
Definition: dcd_nuc120.c:241
void dcd_sof_enable(uint8_t rhport, bool en)
Definition: dcd_nuc120.c:502
static bool active_ep0_xfer
Definition: dcd_nuc120.c:73
uint16_t total_bytes
Definition: dcd_nuc505.c:113
uint8_t dev_addr
Definition: dcd_pic32mz.c:81
uint8_t const * buffer
Definition: midi_device.h:100
AUDIO Channel Cluster Descriptor (4.1)
Definition: audio.h:647
uint8_t bmAttributes
See: audio_clock_source_attribute_t.
Definition: audio.h:672
uint8_t bEndpointAddress
Definition: video.h:306
uint8_t * data_ptr
Definition: dcd_nuc120.c:78
uint16_t total_bytes
Definition: dcd_nuc120.c:85
uint16_t out_bytes_so_far
Definition: dcd_nuc120.c:82
uint16_t in_remaining_bytes
Definition: dcd_nuc120.c:81
tu_fifo_t * ff
uint8_t ep_addr
Definition: dcd_da146xx.c:221
uint16_t max_packet_size
Definition: dcd_da146xx.c:216
static TU_ATTR_ALWAYS_INLINE uint16_t tu_min16(uint16_t x, uint16_t y)
Definition: tusb_common.h:155
uint16_t tu_fifo_write_n(tu_fifo_t *f, const void *data, uint16_t n)
This function will write n elements into the array index specified by the write pointer and increment...
Definition: tusb_fifo.c:861
uint16_t tu_fifo_read_n(tu_fifo_t *f, void *buffer, uint16_t n)
This function will read n elements from the array index specified by the read pointer and increment t...
Definition: tusb_fifo.c:730
tusb_dir_t
Definition: tusb_types.h:65
@ TUSB_DIR_IN
Definition: tusb_types.h:67
@ TUSB_DIR_IN_MASK
Definition: tusb_types.h:69
@ TUSB_SPEED_FULL
Definition: tusb_types.h:50
static TU_ATTR_ALWAYS_INLINE uint8_t tu_edpt_number(uint8_t addr)
Definition: tusb_types.h:507
@ XFER_RESULT_SUCCESS
Definition: tusb_types.h:237
static TU_ATTR_ALWAYS_INLINE uint16_t tu_edpt_packet_size(tusb_desc_endpoint_t const *desc_ep)
Definition: tusb_types.h:515
tusb_xfer_type_t
defined base on USB Specs Endpoint's bmAttributes
Definition: tusb_types.h:58
@ TUSB_XFER_ISOCHRONOUS
Definition: tusb_types.h:60
TU_ATTR_PACKED_END TU_ATTR_BIT_FIELD_ORDER_END static TU_ATTR_ALWAYS_INLINE tusb_dir_t tu_edpt_dir(uint8_t addr)
Definition: tusb_types.h:502