Open FFBoard
Open source force feedback firmware
ch34x.h
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1/*
2 * The MIT License (MIT)
3 *
4 * Copyright (c) 2023 Heiko Kuester
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 *
24 * This file is part of the TinyUSB stack.
25 */
26
27#ifndef _CH34X_H_
28#define _CH34X_H_
29
30// There is no official documentation for the CH34x (CH340, CH341) chips. Reference can be found
31// - https://github.com/WCHSoftGroup/ch341ser_linux
32// - https://github.com/torvalds/linux/blob/master/drivers/usb/serial/ch341.c
33// - https://github.com/freebsd/freebsd-src/blob/main/sys/dev/usb/serial/uchcom.c
34
35// set line_coding @ enumeration
36#ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
37#define CFG_TUH_CDC_LINE_CODING_ON_ENUM_CH34X CFG_TUH_CDC_LINE_CODING_ON_ENUM
38#else // this default is necessary to work properly
39#define CFG_TUH_CDC_LINE_CODING_ON_ENUM_CH34X { 9600, CDC_LINE_CONDING_STOP_BITS_1, CDC_LINE_CODING_PARITY_NONE, 8 }
40#endif
41
42// USB requests
43#define CH34X_REQ_READ_VERSION 0x5F // dec 95
44#define CH34X_REQ_WRITE_REG 0x9A // dec 154
45#define CH34X_REQ_READ_REG 0x95 // dec 149
46#define CH34X_REQ_SERIAL_INIT 0xA1 // dec 161
47#define CH34X_REQ_MODEM_CTRL 0xA4 // dev 164
48
49// registers
50#define CH34X_REG_BREAK 0x05
51#define CH34X_REG_PRESCALER 0x12
52#define CH34X_REG_DIVISOR 0x13
53#define CH34X_REG_LCR 0x18
54#define CH34X_REG_LCR2 0x25
55#define CH34X_REG_MCR_MSR 0x06
56#define CH34X_REG_MCR_MSR2 0x07
57#define CH34X_NBREAK_BITS 0x01
58
59#define CH341_REG_0x0F 0x0F // undocumented register
60#define CH341_REG_0x2C 0x2C // undocumented register
61#define CH341_REG_0x27 0x27 // hardware flow control (cts/rts)
62
63#define CH34X_REG16_DIVISOR_PRESCALER TU_U16(CH34X_REG_DIVISOR, CH34X_REG_PRESCALER)
64#define CH32X_REG16_LCR2_LCR TU_U16(CH34X_REG_LCR2, CH34X_REG_LCR)
65
66// modem control bits
67#define CH34X_BIT_RTS ( 1 << 6 )
68#define CH34X_BIT_DTR ( 1 << 5 )
69
70// line control bits
71#define CH34X_LCR_ENABLE_RX 0x80
72#define CH34X_LCR_ENABLE_TX 0x40
73#define CH34X_LCR_MARK_SPACE 0x20
74#define CH34X_LCR_PAR_EVEN 0x10
75#define CH34X_LCR_ENABLE_PAR 0x08
76#define CH34X_LCR_PAR_MASK 0x38 // all parity bits
77#define CH34X_LCR_STOP_BITS_2 0x04
78#define CH34X_LCR_CS8 0x03
79#define CH34X_LCR_CS7 0x02
80#define CH34X_LCR_CS6 0x01
81#define CH34X_LCR_CS5 0x00
82#define CH34X_LCR_CS_MASK 0x03 // all CSx bits
83
84#endif /* _CH34X_H_ */